Author: lechuck park

AI Infrastructure Architect & Technical Visualizer "Complex Systems, Simplified. I translate massive AI infrastructure into visual intelligence." I love to learn computer tech and help people by the digital.

Add with power

Posted on by lechuck park

Add with Power: 8-Bit Binary Addition and Energy Transformation

Core Mechanism:

  1. Input: Two 8-energy binary states (both rows ending with 1)
  2. Computation Process: 1+1 = 2 (binary overflow occurs)
  3. Result:
    • Output row’s last bit changed to 0
    • Part of energy converted to heat

Key Components:

  • Two input rows with 8 binary “energies”
  • Computing symbol (+) representing addition
  • A heat generation (?) box marked x8
  • Resulting output row with modified energy state

Fundamental Principle: “All energies must be maintained with continuous energies for no error (no changes without Computing)”

This diagram illustrates:

  • Binary addition process
  • Energy conservation and transformation
  • Information loss during computation
  • Relationship between computation, energy, and heat generation

The visual representation shows how a simple 8-bit addition triggers energy transfer, with overflow resulting in heat production and a modified binary state.

WIth Claude

Control Flow Enforcement Tech.

Posted on by lechuck park

This image is an illustrative diagram of Control Flow Enforcement Technology (CET). CET is a hardware-based security feature, primarily supported by Intel CPUs.

The diagram shows the two main mechanisms of CET:

  1. Shadow Stack:
  • Stores the return address on a separate, secure stack to prevent an attacker from changing it.
  • When a function is called, the hardware writes the return address to the shadow stack.
  • When the function returns, the address on the stack is compared to the address on the shadow stack, and an exception is thrown if they don’t match.
  1. Indirect Branch Tracking:
  • Restricts indirect jumps or calls via function pointers, etc. to prevent jumps to arbitrary code.
  • Hardware enforces that only code that starts with an End of Branch (ENDBR) instruction can be executed.

At the bottom of the diagram is a visual representation of the process of calling a function and exiting the function with the ENDBR instruction. This shows the process of logging (storing) the return address when the function is called and comparing it to the stored address when the function exits.

With Claude

Digital Twin and the LLM

Posted on by lechuck park

Digital Twin Concept

A Digital Twin is composed of three key elements:

  • High Precision Data: Exact, structured numerical data
  • Real 3D Model: Visual representation that is easy to comprehend
  • History/Prediction Simulation: Temporal analysis capabilities

LLM Approach

Large Language Models expand on the Digital Twin concept with:

  • Enormous Unstructured Data: Ability to incorporate and process diverse, non-structured information
  • Text-based Interface: Making analysis more accessible through natural language rather than requiring visual interpretation
  • Enhanced Simulation: Improved predictive capabilities leveraging more comprehensive datasets

Key Advantages of LLM over Traditional Digital Twin

  1. Data Flexibility: LLMs can handle both structured and unstructured data, expanding beyond the limitations of traditional Digital Twins
  2. Accessibility: Text-based interfaces lower the barrier to understanding complex analyses
  3. Implementation Efficiency: Recent advances in LLM and GPU technologies make these solutions more practical to implement than complex Digital Twin systems
  4. Practical Application: LLMs offer a more approachable alternative while maintaining the core benefits of Digital Twin concepts

This comparison illustrates how LLMs can serve as an evolution of Digital Twin technology, providing similar benefits through more accessible means and potentially expanding capabilities through their ability to process diverse data types.

With Claude

NAPI

Posted on by lechuck park

This image shows a diagram of the Network New API (NAPI) introduced in Linux kernel 2.6. The diagram outlines the key components and concepts of NAPI with the following elements:

The diagram is organized into several sections:

  1. NAPI – The main concept is highlighted in a purple box
  2. Hybrid Mode – In a red box, showing the combination of interrupt and polling mechanisms
  3. Interrupt – In a green box, described as “to detect packet arrival”
  4. Polling – In a blue box, described as “to process packets in batches”

The Hybrid Mode section details four key features:

  1. <Interrupt> First – For initial packet detection
  2. <Polling> Mode – For interrupt mitigation
  3. Fast Packet Processing – For multi-packet processing in one time
  4. Load Balancing – For parallel processing with multiple cores

On the left, there’s a yellow box explaining “Optimizing interrupts during FAST Processing”

The bottom right contains additional information about prioritizing and efficiently allocating resources to process critical tasks quickly, accompanied by warning/hand and target icons.

The diagram illustrates how NAPI combines interrupt-driven and polling mechanisms to efficiently handle network packet processing in Linux.

With Claude