Memoy Leak

Posted on by lechuck park

From Claude with some prompting
This image illustrates the process of “Memory Leak Checking”. The main components and steps are as follows:

  1. Process Is Started:
    • When a process starts, it connects through an API to a “Like Virtual Machine” environment.
    • In this environment, “Hooking” techniques are employed.
  2. Process Is Running:
    • The running process generates a “Software Interrupt” through the API.
    • There’s “Tracking syscall with Ptrace()” occurring at this stage.
  3. Memory :
    • Functions related to memory allocation, modification, and deallocation (such as malloc(), calloc(), free()) are called.
  4. Memory Leakage Management:
    • This component tracks memory Changes and Status.
  5. OS kernel:
    • OS kernel parameters about memory are involved in the process.

The diagram shows the overall process of detecting and managing memory leaks. It demonstrates how memory leaks are systematically monitored and managed from the start of a process, through its execution, memory management, and interaction with the operating system.
This diagram effectively visualizes the complex process of memory leak checking, showing how different components interact to monitor and manage memory usage in a running process.

HTTP/3 with QUIC & TLS1.3

Posted on by lechuck park

From Claude with some prompting
This image provides an overview of HTTP/3, highlighting its key features and components:

  1. 0-RTT with TLS1.3 (Zero Round Trip Time):
    • Compares TLS 1.2 and 1.3 connection processes.
    • TLS 1.3 offers faster handshake, reducing latency.
  2. Multiplexing with no HOLB (Head-of-Line Blocking):
    • UDP-based, eliminating TCP’s 3-way handshake and TCP SEQ.
    • Uses frame exchange, structured as streams, messages, and frames.
  3. Reliable:
    • QUIC-based, ensuring reliable data transfer.
    • Uses Connection ID to maintain connections despite client IP or port changes.
    • Packet Number uniquely identifies each packet within a connection.
  4. Flow/Congestion Control:
    • Lists various frame types for traffic optimization.

The diagram emphasizes that HTTP/3 is UDP-based and utilizes the QUIC protocol to enhance connection reliability and efficiency. It illustrates core concepts such as frame-based data exchange and the use of Connection IDs.

The image also details the QUIC header structure, explains how packet ordering and loss handling work, and provides a comprehensive list of frame types used in HTTP/3.

Overall, this diagram effectively visualizes the improvements HTTP/3 brings over its predecessors in terms of speed, reliability, and efficiency in data transfer.

Kernel Samepage Merging

Posted on by lechuck park

From Claude with some prompting
This image illustrates Kernel Samepage Merging (KSM), a memory management technique used to optimize memory usage in computing systems.

Key components of the image:

  1. Top left: Icons representing disk/file systems (“almost”) and a memory grid.
  2. Memory grid: Shows memory pages filled with various letters (A-Z). Note the repeated occurrences of ‘A’ pages.
  3. Bottom: Multiple processes (Process1, Process2, Process3, Process4) sharing this memory.
  4. Right side: Explains how KSM works in four stages:
    • Searching: Locating pages with identical content.
    • Merging: Combining identical pages into one.
    • Counting: Tallying references to the merged page.
    • Updating: Refreshing page references.

KSM works by identifying and merging memory pages with identical content, thus reducing memory usage. This is particularly useful in virtualized environments where multiple virtual machines might be running similar operating systems.

The image effectively demonstrates how KSM can identify duplicate ‘A’ pages across different memory locations and processes, merging them to save memory space while maintaining proper references for each process.

New Infra Age

Posted on by lechuck park

From Claude with some prompting
This diagram illustrates the cyclical evolution of computing infrastructure, emphasizing the re-entry into a new computing infrastructure era driven by AI technology:

  1. Development cycle:
    • Traditional infrastructure era (Infra age) → Software era (SW Age) → New infrastructure era (New Infra age)
  2. Core elements of the new infrastructure era:
    • AI/ML (highlighted with red circles): Processing humanity’s accumulated experiences and data
    • GPU: Key computing infrastructure for AI
  3. Driving forces of development:
    • More Users
    • More Data
    • These are visualized by the icons at the bottom
  4. Key connection points (highlighted with red circles):
    • PC: Increased user base due to personal computer proliferation
    • Internet: Enhanced global connectivity
    • Web: Improved information accessibility
    • Mobile: Anytime, anywhere access environment
    • AI/ML: Processing and utilization of accumulated data
  5. Cyclical development:
    • User increase → Data increase → Infrastructure development to process this data → Attraction of more users, creating a cyclical structure

This diagram emphasizes that as AI technology begins to comprehensively process and utilize humanity’s accumulated experiences and data, it necessitates the expansion of new GPU-centric computing infrastructure to support this. It demonstrates a cyclical structure where processing more users and data leads to further infrastructure development, which in turn enables handling even more users and data.

Automatic Control System

Posted on by lechuck park

From Claude with some prompting
focusing on the importance of computing in automatic control systems and the distinction between devices with sufficient computing power and those without:

  1. Basic Structure of Automatic Control System:
    • The system operates in the sequence of Sensing -> Data IN -> CPU -> Out -> Action.
    • This entire process occurs within the ‘Computing’ phase, which is crucial for automatic control.
  2. Device Classification Based on Computing Capability:
    • ‘Nice Computing Inside’: Represents devices with sufficient computing power. These devices can process complex control logic independently.
    • ‘Nice Computing Outside’: Indicates devices with limited computing capabilities. These devices rely on external computing resources for automatic control.
  3. Utilization of External Computing Resources:
    • The ‘External Computing Device’ allows devices with limited computing power to perform advanced automatic control functions.
    • This is implemented through external computing devices such as PLCs (Programmable Logic Controllers) or DDCs (Direct Digital Controls).
  4. System Integration:
    • ‘Interface & API’ facilitates the connection and communication between various devices and external computing resources.
    • The ‘Integration’ section demonstrates how these diverse elements function as a unified automatic control system.
  5. Importance of Computing:
    • In automatic control systems, computing plays a crucial role in data processing, decision-making, and generating control commands.
    • By appropriately utilizing internal or external computing resources, various types of equipment can function as part of an efficient automatic control system.

This diagram effectively illustrates the flexibility and scalability of automatic control systems, explaining different approaches based on computing capabilities. The forthcoming explanation about PLC/DDC and other external computing devices will likely provide more concrete insights into the practical implementation of these systems.